Used for testing, programming and debugging embedded system called JTAG standard hardware tools. It developed by joint test action group and can be used for most of the micro controller and FPGA. Anyone who recently written a modern microcontrollers can use a JTAG or relevant standards.
Take a look at what is the standard, and why it is important for the test.
The evolution of the JTAG
JTAG appeared in the 1980 s, as a solution to the IO pin density increases and the ball grid array (BGA) package to use solution. The standard requires the introduction of small logic unit for boundary scan, in the test access port (TAP) execute commands to improve testing capabilities. This is a flexible system that allows manufacturers to add to facilitate programming and debugging command and logical block.
One of the reasons for widely using the JTAG device programming is that it allows for custom logic. Address the binary code to reduce the number of pins, opened the door to a larger memory. Then serial protocol lets the programmer can access the device through a few pins, regardless of the memory size. Standardization of interface leads to have different implementation consistency between types of devices.
This standard has passed the ARM serial debugging (SWD) tools such as expanded, so that more diversified JTAG. In order to meet the needs of today's world the JTAG compliance, the equipment must be use the following types of pin: text data input (TDI), test data output (TDO), test the clock (TCK) and test mode selection (TMS).
Tester using a state machine, which is a kind of changing state the behavior of the model by input. Test access point (TAP) state machine exists in the controller, the controller explain TCK and TMS signal. State machine respectively for two different modes of instructions and data. The state machine may also have an optional test reset pin (TRST).
JTAG features
JTAG is a kind of boundary scan system, used to test multiple hardware interconnection between IC components. JTAG system involving the connector pin value to test the function.
Operating the JTAG TAP only need four or five pins, it communication with the JTAG interface devices. Although the JTAG standard connector, but it must be a standard header, such as ARM JTAG, ARM JTAG 14 and 20 TI JTAG 14. ARM JTAG 20 can use similar Segger J - Link and J - Trace connector instead.
Consider other joints including STMicroelectronics STDC14, infineon OCDS 16 pin connector, 10 and 20 CoreSight CoreSight. Most of the joint for head, usually with a 10-20 pins and pin spacing of 0.05 to 0.1 inches.